Information is increasingly being transmitted in synchronous digital formats. In most applications, a data stream is modulated onto a carrier frequency with this modulated carrier signal transmitted over a communications channel. Most methods of modulation in use today use phase information of the carrier frequency, i.e. coherent modulation.
The key to demodulating a phase modulated signal is that a carrier with the correct frequency and phase relationship must be applied to the demodulator along with the phase modulated signal. In order to properly demodulate the modulated signal at the receiver, most receivers include both a carrier synchronizer and a clock synchronizer. Typically, phaselocked loops and the like are used in the synchronizers.
Various types of carrier synchronizer circuits are known at this time. Three types of carrier synchronizers typically used with binary phase shift keying (BPSK) modulation include the squaring loop, the Costas loop and the remodulator (sometimes referred to as the inverse or reverse modulator or unmodulator). To function properly, these synchronizers generally require a received signal having a relatively high signal-to-noise (S/N) ratio. Modified versions of these three basic types of synchronizers are used in communications systems employing other multiphase modulation formats.
A digital receiver or modem (receiving digital data over a carrier frequency) must achieve synchronization with the transmitter before the user data can be related from the transmitter to the receiver. In most communications systems, a known "data packet" (a known digital data pattern) is provided at the beginning of a data transmission to allow the receiver to achieve synchronization. This data packet is called a preamble. In some communications systems, a continuous wave (CW) carrier functions as the preamble and is transmitted to permit the receiver or modem to obtain the frequency and phase parameter estimates independent of data demodulation. This reduces the number of simultaneous variables that the receiver must solve at one time. However, in some preambles, such as the standard preamble set forth in MIL-STD-188-183, the CW sections are very short.
Since the digital data packet (preamble) in a particular communication system is known by the receiver, the receiver has a priori information about the incoming received signal and uses this information to make the necessary synchronization estimates. Preamble usage allows the receiver to synchronize to a received signal having a relatively low S/N ratio. As such, waveforms with preambles are generally used in communications systems because this allows receiver synchronization with received signals having relatively lower S/N ratios. A matched filter receiver is one type of carrier synchronizer using preamble information of a received signal to achieve synchronization.
As the preamble data is transmitted over the communications channel to the receiver, a delay or offset of the preamble occurs. This delay or offset caused by the communications channel and the receiver is called the timing ambiguity. Accordingly, the received data pattern of the preamble may be offset in time. In matched filter circuits, the timing ambiguity must be reduced to less than 1/2 a symbol period in order for the receiver to operate at very low S/N ratios. If the timing ambiguity is greater than 1/2 a symbol period, synchronization is impeded due to a large beatnote output by the phase detector in the receiver.
Depending on the length of the data pattern in the preamble before it repeats, the data pattern could appear to the receiver as one of a number of sequences. Since the timing ambiguity is random and may be uniformly distributed over the length of the repeated preamble data pattern, all of the sequences are equally likely. Accordingly, to achieve a timing ambiguity of less than 1/2 a symbol period and thus operate at low S/N ratios, a structure utilizing multiple matched filters is required. The required number of matched filters generally equals the number of equally likely data pattern (preamble) sequences that may be received multiplied by two. Conceptually, this results in several acquisition estimates running concurrently. At some timing instant, the estimate that has the highest correlation voltage is then chosen.
Operation of a low S/N ratio carrier synchronization circuit utilizing data preambles requires a number of additional parallel matched filter structures. The number of such structures equals the number of likely sequences of the repeated data pattern of the preamble (multiplied by two, if timing ambiguity of less than 1/2 is desired). Whether implemented in hardware or software, such an implementation requires additional circuitry, processing software and/or processing time.
Accordingly, there exists a need for an apparatus and method for carrier synchronization using a preamble in a receiver that operates at low S/N ratios. Further, there is needed an apparatus and method that reduces cost, complexity, software processing and/or computing power to achieve carrier synchronization. There exists a need for an improved and less costly carrier synchronization circuit and method in a communications system receiver utilizing preambles for carrier synchronization.